DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 383
DF61654N50FTV
Manufacturer Part Number
DF61654N50FTV
Description
IC H8SX/1654 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.DF61653N50FTV.pdf
(1020 pages)
Specifications of DF61654N50FTV
Core Processor
H8SX
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
75
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF61654N50FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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8.5.9
Table 8.9 shows the execution status for a single DTC data transfer, and table 8.10 shows the
number of cycles required for each execution.
Table 8.9
[Legend]
P: Block size (CRAH and CRAL value)
Note:
Mode
Normal 1
Repeat 1
Block
transfer
1. When transfer information read is skipped
2. In full address mode operation
3. In short address mode operation
4. When the SAR or DAR is in fixed mode
5. When the SAR and DAR are in fixed mode
6. When a longword is transferred while an odd address is specified in the address
7. When a word is transferred while an odd address is specified in the address register or
Vector
Read
I
1
Number of DTC Execution Cycles
register
when a longword is transferred while address 4n + 2 is specified
DTC Execution Status
0*
0*
0*
1
1
1
Transfer
Information
Read
J
4*
4*
4*
2
2
2
3*
3*
3*
3
3
3
0*
0*
0*
1
1
1
Transfer
Information
Write
L
3*
3*
3*
2.3
2.3
2.3
2*
2*
2*
4
4
4
1*
1*
1*
5
5
5
Data Read
L
3*
3*
3•P
*
6
6
6
2*
2*
2•P*
Section 8 Data Transfer Controller (DTC)
Rev.1.00 Sep. 08, 2005 Page 333 of 966
7
7
7
1
1
1•P 3•P
Data Write
M
3*
3*
*
6
6
6
2*
2*
2•P*
7
7
7
REJ09B0219-0100
1
1
1•P
Internal
Operation
N
1
1
1
0*
0*
0*
1
1
1
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