DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 364

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 8 Data Transfer Controller (DTC)
8.2.6
CRB is a 16-bit register that designates the number of times data is to be transferred by the DTC in
block transfer mode. It functions as a 16-bit transfer counter (1 to 65,536) that is decremented by 1
every time data is transferred, and bit DTCEn (n = 15 to 0) corresponding to the activation source
is cleared and then an interrupt is requested to the CPU when the count reaches H'0000. The
transfer count is 1 when CRB = H'0001, 65,535 when CRB = H'FFFF, and 65,536 when CRB =
H'0000.
CRB is not available in normal and repeat modes and cannot be accessed directly by the CPU.
8.2.7
DTCER which is comprised of eight registers, DTCERA to DTCERE, DTCERG, and DTCERH,
is a register that specifies DTC activation interrupt sources. The correspondence between interrupt
sources and DTCE bits is shown in table 8.1. Use bit manipulation instructions such as BSET and
BCLR to read or write a DTCE bit. If all interrupts are masked, multiple activation sources can be
set at one time (only at the initial setting) by writing data after executing a dummy read on the
relevant register.
Rev.1.00 Sep. 08, 2005 Page 314 of 966
REJ09B0219-0100
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
DTC Transfer Count Register B (CRB)
DTC enable registers A to E, G, and H
(DTCERA to DTCERE, DTCERG, and DTCERH)
DTCE15
DTCE7
R/W
R/W
15
0
7
0
DTCE14
DTCE6
R/W
R/W
14
0
6
0
DTCE13
DTCE5
R/W
R/W
13
0
5
0
DTCE12
DTCE4
R/W
R/W
12
0
4
0
DTCE11
DTCE3
R/W
R/W
11
3
0
0
DTCE10
DTCE2
R/W
R/W
10
0
2
0
DTCE9
DTCE1
R/W
R/W
9
0
1
0
DTCE8
DTCE0
R/W
R/W
8
0
0
0