DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 76

• Manufacturer Part Number: DF61654N50FTV
• Description: IC H8SX/1654 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61654N50FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 2 CPU
2.5
The H8SX CPU has the internal registers shown in figure 2.9. There are two types of registers:
general registers and control registers. The control registers are the 32-bit program counter (PC),
8-bit extended control register (EXR), 8-bit condition-code register (CCR), 32-bit vector base
register (VBR), 32-bit short address base register (SBR), and 64-bit multiply-accumulate register
(MAC).
Rev.1.00 Sep. 08, 2005 Page 26 of 966
REJ09B0219-0100
General Registers and Extended Registers
[Legend]
SP:
PC:
CCR:
I:
UI:
H:
ER0
ER1
ER2
ER3
ER4
ER5
ER6
ER7 (SP)
Control Registers
PC
VBR
SBR
MAC
Registers
Stack pointer
Program counter
Condition-code register
Interrupt mask bit
User bit or interrupt mask bit
Half-carry flag
15
63
31
31
31
31
E0
E1
E2
E3
E4
E5
E6
E7
Figure 2.9 CPU Registers
U:
N:
Z:
V:
C:
EXR:
Sign extension
User bit
Negative flag
Zero flag
Overflow flag
Carry flag
Extended control register
0 7
MACL
R0H
R1H
R2H
R3H
R4H
R5H
R6H
R7H
12
0 7
CCR
EXR
T:
I2 to I0:
VBR:
SBR:
MAC:
41
8
(Reserved)
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
T — — — — I2 I1 I0
I UI H U N Z V C
Trace bit
Interrupt mask bits
Vector base register
Short address base register
Multiply-accumulate register
MACH
(Reserved)
R0L
R1L
R2L
R3L
R4L
R5L
R6L
R7L
32
0
0
0
0
0