DF61654N50FTV Renesas Electronics America, DF61654N50FTV Datasheet - Page 171
DF61654N50FTV
Manufacturer Part Number
DF61654N50FTV
Description
IC H8SX/1654 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.DF61653N50FTV.pdf
(1020 pages)
Specifications of DF61654N50FTV
Core Processor
H8SX
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, PWM, WDT
Number Of I /o
75
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF61654N50FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 171 of 1020
- Download datasheet (6Mb)
Table 5.8 shows a setting example of the priority control function over the DTC and DMAC and
the transfer request control state. A priority level can be independently set to each DMAC channel,
but the table only shows one channel for example. Transfers through the DMAC channels can be
separately controlled by assigning different priority levels for channels.
Table 5.8
Interrupt Control
Mode
0
2
Example of Priority Control Function Setting and Control State
CPUPCE in
CPUPCR
0
1
0
1
CPUP2 to
CPUP0
Any
B'000
B'100
B'100
B'100
B'000
Any
B'000
B'000
B'011
B'100
B'101
B'110
B'111
B'101
B'101
DTCP2 to
DTCP0
Any
B'000
B'000
B'000
B'111
B'111
Any
B'000
B'011
B'011
B'011
B'011
B'011
B'011
B'011
B'110
DMAP2 to
DMAP0
Any
B'000
B'000
B'011
B'101
B'101
Any
B'000
B'101
B'101
B'101
B'101
B'101
B'101
B'101
B'101
Rev.1.00 Sep. 08, 2005 Page 121 of 966
Enabled
Enabled
Masked
Masked
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Masked
Masked
Masked
Masked
Masked
Enabled
Transfer Request Control State
DTC
Section 5 Interrupt Controller
REJ09B0219-0100
DMAC
Enabled
Enabled
Masked
Masked
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Masked
Masked
Enabled
Enabled
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