DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 140

• Manufacturer Part Number: DF2218BR24V
• Description: IC H8S/2218 MCU FLASH 112-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2218BR24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-LFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 4.3
Legend:
×: Don't care
A reset caused by the watchdog timer can also be of either of two types: a power-on reset or a
manual reset.
When the MRES pin* is used, MRES pin* input must be enabled by setting the MRESE bit to 1 in
SYSCR.
Note:* Supported only by the H8S/2218 Group.
4.3.2
When the RES or MRES* pin goes low, this LSI enters the reset. To ensure that this LSI is reset,
hold the RES pin low for at least 20 ms at power-up. To reset the chip during operation, hold the
RES or MRES* pin low for at least 20 states.
When the RES or MRES* pin goes high after being held low for the necessary time, this LSI starts
reset exception handling as follows.
1. The internal state of the CPU and the registers of the on-chip peripheral modules are initialized,
2. The reset exception handling vector address is read and transferred to the PC, and program
Note: * Supported only by the H8S/2218 Group.
Figures 4.1 and 4.2 show examples of the reset sequence.
Rev.7.00 Dec. 24, 2008 Page 84 of 698
REJ09B0074-0700
Type
Power-on reset
Manual reset
the T bit is cleared to 0 in EXR, and the I bit is set to 1 in EXR and CCR.
execution starts from the address indicated by the PC.
Reset Exception Handling
Reset Types
MRES
×
Low
Reset Transition Condition
RES
Low
High
CPU
Initialized
Initialized
On-Chip Peripheral Modules
Initialized
Initialized, except for bus
controller and I/O ports
Internal State