DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 578

IC H8S/2218 MCU FLASH 112-LFBGA

DF2218BR24V

Manufacturer Part Number
DF2218BR24V
Description
IC H8S/2218 MCU FLASH 112-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2218BR24V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
112-LFBGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2218BR24V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(b) EP2 DMA transfer procedure
Perform DMAC transfer in 1 packet units. After setting the EP2READY flag, check the size of
data received from the host and then set the data size as the number of DMAC transfers.
1. Set the bits EP2T1 and EP2T0 in UDMAR.
2. Wait for the EP2READY flag in UIFR1 to be set.
3. Set DMAC.
4. Activate DMAC.
5. Perform DMA transfer (not more than 64 bytes).
6. Wait for DMA transfer end.
7. Repeat steps 2 to 6.
14.6.2
(1) Overview
Burst mode transfer or ycle steal transfer can be selected for the on-chip DMAC auto-request
transfer. Endpoints that can be transferred by the on-chip DMAC are all registers (UEDR0s,
UEDR0i, UEDR0o, UEDR1, UEDR2, UEDR3). Confirm flags and interrupts corresponding to
each data register before activating the DMA. As UDMAR is not used in auto-request mode, set
UDMAR to H'00.
(2) On-Chip DMAC Settings
The on-chip DMAC must be specified as follows: Auto-request, byte size, full-address mode
transfer, and number of transfers equal to or less than the maximum packet size of the data
register. After completing the DMAC transfers of specified time, the DMAC automatically stops.
Rev.7.00 Dec. 24, 2008 Page 522 of 698
REJ09B0074-0700
Read the value in UESZ2 and specifies the size of received data (not more than 64 bytes) as the
number of transfers.
DMA Transfer by Auto-Request
Figure 14.23 EP2RDFN Operation in UTRG0
64 bytes
EP2RDFN
(Automatically
performed)
64 bytes
EP2RDFN
(Automatically
performed)
22 bytes
EP2RDFN
(Automatically
performed)

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