DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 272

IC H8S/2218 MCU FLASH 112-LFBGA

DF2218BR24V

Manufacturer Part Number
DF2218BR24V
Description
IC H8S/2218 MCU FLASH 112-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2218BR24V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
112-LFBGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2218BR24V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
8.1
In the H8S/2218 Group, the port 1 is an 8-bit I/O port also functioning as address bus pins, TPU
I/O pins, and external interrupt input pins. In the H8S/2212 Group, the port 1 is an 8-bit I/O port
also functioning as TPU I/O pins and external interrupt input pins. The port 1 has the following
registers.
• Port 1 data direction register (P1DDR)
• Port 1 data register (P1DR)
• Port 1 register (PORT1)
8.1.1
P1DDR specifies input or output for the pins of the port 1.
Since P1DDR is a write-only register, the bit manipulation instructions must not be used to write
P1DDR. For details, see section 2.9.4, Accessing Registers Containing Write-Only Bits.
Rev.7.00 Dec. 24, 2008 Page 216 of 698
REJ09B0074-0700
Bit
7
6
5
4
3
2
1
0
Bit Name Initial Value
P17DDR
P16DDR
P15DDR
P14DDR
P13DDR
P12DDR
P11DDR
P10DDR
Port 1 Data Direction Register (P1DDR)
Port 1
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
R/W
Description
(H8S/2218 Group)
Modes 4 to 6:
If address output is enabled by the setting of bits AE3 to
AE0 in PFCR, pins P13 to P10 are address outputs. Pins
P17 to P14, and pins P13 to P10 when address output is
disabled, are output ports when the corresponding
P1DDR bits are set to 1, and input ports when the
corresponding P1DDR bits are cleared to 0.
Mode 7:
Setting a P1DDR bit to 1 makes the corresponding port 1
pin an output port, while clearing the bit to 0 makes the
pin an input port.
(H8S/2212 Group)
Setting a P1DDR bit to 1 makes the corresponding port 1
pin an output port, while clearing the bit to 0 makes the
pin an input port.

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