DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 244

• Manufacturer Part Number: DF2218BR24V
• Description: IC H8S/2218 MCU FLASH 112-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2218BR24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-LFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Figure 7.9 shows an example of the setting procedure for normal mode.
Rev.7.00 Dec. 24, 2008 Page 188 of 698
REJ09B0074-0700
Set number of transfers
and transfer destination
Figure 7.9 Example of Normal Mode Setting Procedure
Set transfer source
Read DMABCRL
Set DMABCRH
Set DMABCRL
Normal mode
Normal mode
Set DMACR
addresses
setting
[1]
[2]
[3]
[4]
[5]
[6]
[1] Set each bit in DMABCRH.
[2] Set the transfer source address in MARA, and
[3] Set the number of transfers in ETCRA.
[4] Set each bit in DMACRA and DMACRB.
[5] Read the DTE = 0 and DTME = 0 in
[6] Set each bit in DMABCRL.
the transfer destination address in MARB.
DMABCRL.
· Set the FAE bit to 1 to select full address
· Specify enabling or disabling of internal
· Set the transfer data size with the DTSZ bit.
· Specify whether MARA is to be
· Clear the BLKE bit to 0 to select normal
· Specify whether MARB is to be
· Select the activation source with bits DTF3
· Specify enabling or desabling of transfer
· Set both the DTME bit and the DTE bit to 1
mode.
interrupt clearing with the DTA bit.
incremented, decremented, or fixed, with
the SAID and SAIDE bits.
mode.
incremented, decremented, or fixed, with
the DAID and DAIDE bits.
to DTF0.
end interrupts with the DTIE bit.
to enable transfer.