DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 226

• Manufacturer Part Number: DF2218BR24V
• Description: IC H8S/2218 MCU FLASH 112-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2218BR24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-LFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.7.00 Dec. 24, 2008 Page 170 of 698
REJ09B0074-0700
Bit Bit Name Initial Value R/W
11
10
9
8
DTA1B
DTA1A
DTA0B
DTA0A
0
0
0
0
R/W
R/W
R/W
R/W
Description
Data Transfer Acknowledge
These bits enable or disable clearing, when DMA transfer is
performed, of the internal interrupt source selected by the
data transfer factor setting.
When DTE = 1 and DTA = 1, the internal interrupt source
selected by the data transfer factor setting is cleared
automatically by DMA transfer. When DTE = 1 and DTA = 1,
the internal interrupt source selected by the data transfer
factor setting does not issue an interrupt request to the CPU.
When DTE = 1 and DTA = 0, the internal interrupt source
selected by the data transfer factor setting is not cleared
when a transfer is performed, and can issue an interrupt
request to the CPU in parallel. In this case, the interrupt
source should be cleared by the CPU.
When DTE = 0, the internal interrupt source selected by the
data transfer factor setting issues an interrupt request to the
CPU regardless of the DTA bit setting.
0: Clearing of selected internal interrupt source at time of
1: Clearing of selected internal interrupt source at time of
DMA transfer is disabled
DMA transfer is enabled