DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 484

• Manufacturer Part Number: DF2218BR24V
• Description: IC H8S/2218 MCU FLASH 112-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2218BR24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-LFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

12.7.2
Figure 12.25 shows the transfer data format in Smart Card interface mode.
• One frame consists of 8-bit data plus a parity bit in asynchronous mode.
• In transmission, a guard time of at least 2 etu (Elementary time unit: the time for transfer of
• If a parity error is detected during reception, a low error signal level is output for one etu
• If an error signal is sampled during transmission, the same data is retransmitted automatically
Data transfer with other types of IC cards (direct convention and inverse convention) are
performed as described in the following.
With the direction convention type IC and the above sample start character, the logic 1 level
corresponds to state Z and the logic 0 level to state A, and transfer is performed in LSB-first order.
The start character data above is H'3B. For the direct convention type, clear the SDIR and SINV
Rev.7.00 Dec. 24, 2008 Page 428 of 698
REJ09B0074-0700
one bit) is left between the end of the parity bit and the start of the next frame.
period, 10.5 etu after the start bit.
after a delay of 2 etu or longer.
Data Format (Except for Block Transfer Mode)
When there is no parity error
When a parity error occurs
D
D0 to D7:
Dp:
DE:
Legend:
S
:
Figure 12.26 Direct Convention (SDIR = SINV = O/E = 0)
Figure 12.25 Normal Smart Card Interface Data Format
(Z)
Ds
Ds
Start bit
Data bits
Parity bit
Error signal
Ds
A
D0
D0
D0
Z
D1
D1
D1
Z
Transmitting station output
Transmitting station output
D2
D2
D2
A
D3
Z
D3
D3
D4
Z
D4
D4
D5
Z
D5
D5
D6
A
D6
D6
D7
A
Dp
Z
D7
D7
Dp
Dp
(Z) State
Receiving station
output
DE