DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 638

• Manufacturer Part Number: DF2218BR24V
• Description: IC H8S/2218 MCU FLASH 112-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2218BR24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-LFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.7.00 Dec. 24, 2008 Page 582 of 698
REJ09B0074-0700
Notes: 1.
2.
3.
4.
5.
Increment address
Pre-write (clearing data in the block to be erased to 0) isn not required.
x, y, z, α, β, γ, ε, η, θ, and N are shown in section 22.7, Flash Memory Characteristics.
Veryfy data is read in 16 bits.
Only 1 bit in the EBR register must be set. Two or more bits in EBR cannot be set.
Erasure is performed in block units. To erase multiple blocks, each block must be erased sequentially.
Figure 17.14 Erase/Erase-Verify Flowchart
No
No
Set block start address as verify address
H'FF dummy write to verify address
*5
Clear SWE1 bit in FLMCR1
Clear ESU1 bit in FLMCR1
Set SWE1 bit in FLMCR1
Clear EV1 bit in FLMCR1
Set ESU1 bit in FLMCR1
Clear E1 bit in FLMCR1
Set EV1 bit in FLMCR1
All erase block erased?
Last address of block?
Set E1 bit in FLMCR1
Verify data = all 1s?
Read verify data
End of erasing
Set EBR1 (2)
Disable WDT
Enable WDT
Wait (β) μs
Wait (η) μs
Wait (x) μs
Wait (y) μs
Wait (z) μs
Wait (
Wait (γ) μs
Wait (ε) μs
Wait (θ) μs
n = 1
Start
α
) μs
Yes
Yes
Yes
*1
*2
No
*2
*4
*2
*2
*2
*2
*2
*2
*3
Start erasing
Halt erasing
Clear SWE1 bit in FLMCR1
Clear EV1 bit in FLMCR1
Erase failure
Wait (η) μs
Wait (θ) μs
n ≥ (N)?
Yes
No
n ← n + 1
*2