DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 637

• Manufacturer Part Number: DF2218BR24V
• Description: IC H8S/2218 MCU FLASH 112-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2218BR24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-LFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

17.8.2
When erasing flash memory, the erase/erase-verify flowchart shown in Figure 17.14 should be
followed.
1. Prewriting (setting erase block data to all 0s) is not necessary.
2. Erasing is performed in block units. Make only a single-bit specification in the erase block
3. The time during which the E1 bit is set to 1 is the flash memory erase time.
4. The watchdog timer (WDT) is set to prevent overprogramming due to program runaway, etc.
5. For a dummy write to a verify address, write 1-byte data H'FF to an address whose lower 1 bit
6. If the read data is unerased, set erase mode again, and repeat the erase/erase-verify sequence as
register 1, 2 (EBR1, EBR2). To erase multiple blocks, each block must be erased in turn.
An overflow cycle of approximately (y+z+α+β) ms is allowed.
is B'0. Verify data can be read in longwords from the address to which a dummy write was
performed.
before. The maximum number of repetitions of the erase/erase-verify sequence is N.
Erase/Erase-Verify
Rev.7.00 Dec. 24, 2008 Page 581 of 698
REJ09B0074-0700