DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 33

• Manufacturer Part Number: DF2218BR24V
• Description: IC H8S/2218 MCU FLASH 112-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2218BR24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-LFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

14.4 Interrupt Sources ............................................................................................................... 494
14.5 Communication Operation ................................................................................................ 497
14.6 DMA Transfer Specifications ........................................................................................... 520
14.7 USB External Circuit Example ......................................................................................... 525
14.8 Usage Notes ...................................................................................................................... 527
Section 15 A/D Converter
15.1 Features ............................................................................................................................. 535
14.3.26 USB Configuration Value Register (UCVR) ....................................................... 488
14.3.27 USB Test Register 0 (UTSTR0) .......................................................................... 489
14.3.28 USB Test Register 1 (UTSTR1) .......................................................................... 490
14.3.29 USB Test Registers 2 and A to F (UTSTR2, UTSTRA to UTSTRF).................. 492
14.3.30 Module Stop Control Register B (MSTPCRB).................................................... 492
14.3.31 Extended Module Stop Register (EXMDLSTP).................................................. 493
14.5.1 Initialization ......................................................................................................... 497
14.5.2 USB Cable Connection/Disconnection ................................................................ 498
14.5.3 Suspend and Resume Operations ......................................................................... 502
14.5.4 Control Transfer................................................................................................... 506
14.5.5 Interrupt-In Transfer (Endpoint 3) ....................................................................... 512
14.5.6 Bulk-In Transfer (Dual FIFOs) (Endpoint 1)....................................................... 513
14.5.7 Bulk-Out Transfer (Dual FIFOs) (Endpoint 2) .................................................... 515
14.5.8 Processing of USB Standard Commands and Class/Vendor Commands............. 516
14.5.9 Stall Operations.................................................................................................... 517
14.6.1 DMAC Transfer by USB Request........................................................................ 520
14.6.2 DMA Transfer by Auto-Request.......................................................................... 522
14.8.1 Emulator Usage Notes ......................................................................................... 527
14.8.2 Bus Interface ........................................................................................................ 527
14.8.3 Operating Frequency............................................................................................ 527
14.8.4 Setup Data Reception........................................................................................... 528
14.8.5 FIFO Clear ........................................................................................................... 528
14.8.6 IRQ6 Interrupt...................................................................................................... 528
14.8.7 Data Register Overread or Overwrite................................................................... 528
14.8.8 Reset..................................................................................................................... 529
14.8.9 EP0 Interrupt Sources Assignment ...................................................................... 529
14.8.10 Level Shifter for VBUS and IRQx Pins............................................................... 530
14.8.11 USB Endpoint Data Read and Write.................................................................... 530
14.8.12 Restrictions on Entering and Canceling Power-Down Mode............................... 530
14.8.13 USB External Circuit Example ............................................................................ 532
14.8.14 Pin Processing when USB Not Used ................................................................... 533
14.8.15 Notes on TR Interrupt .......................................................................................... 533
14.8.16 Clearing the FIFO when DMA Transfer Is Enabled ............................................ 533
................................................................................................. 535
Rev.7.00 Dec. 24, 2008 Page xxxi of liv
REJ09B0074-0700