DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 262

IC H8S/2218 MCU FLASH 112-LFBGA

DF2218BR24V

Manufacturer Part Number
DF2218BR24V
Description
IC H8S/2218 MCU FLASH 112-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2218BR24V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
112-LFBGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2218BR24V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
7.5
The sources of interrupts generated by the DMAC are transfer end and transfer break. Table 7.10
shows the interrupt sources and their priority order.
Table 7.10 Interrupt Source Priority Order
Enabling or disabling of each interrupt source is set by means of the DTIE bit for the
corresponding channel in DMABCR, and interrupts from each source are sent to the interrupt
controller independently. The relative priority of transfer end interrupts on each channel is decided
by the interrupt controller, as shown in table 7.10.
Figure 7.24 shows a block diagram of a transfer end/transfer break interrupt. An interrupt is always
generated when the DTIE bit is set to 1 while DTE bit is cleared to 0.
In full address mode, a transfer break interrupt is generated when the DTME bit is cleared to 0
while DTIEB bit is set to 1. In both short address mode and full address mode, DMABCR should
be set so as to prevent the occurrence of a combination that constitutes a condition for interrupt
generation during setting.
Rev.7.00 Dec. 24, 2008 Page 206 of 698
REJ09B0074-0700
Interrupt
Name
DEND0A
DEND0B
DEND1A
DEND1B
Interrupts
Figure 7.24 Block Diagram of Transfer End/Transfer Break Interrupt
DTE/
DTME
Short Address Mode
Interrupt due to end of transfer
on channel 0A
Interrupt due to end of transfer
on channel 0B
Interrupt due to end of transfer
on channel 1A
Interrupt due to end of transfer
on channel 1B
DTIE
Interrupt Source
Full Address Mode
Interrupt due to end of transfer
on channel 0
Interrupt due to break in transfer
on channel 0
Interrupt due to end of transfer
on channel 1
Interrupt due to break in transfer
on channel 1
Transfer end/transfer
break interrupt
Interrupt
Priority Order
High
Low

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