DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 510

IC H8S/2218 MCU FLASH 112-LFBGA

DF2218BR24V

Manufacturer Part Number
DF2218BR24V
Description
IC H8S/2218 MCU FLASH 112-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2218BR24V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
112-LFBGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2218BR24V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
13.3.2
IDCODE register is a 32-bit register. If INSTR is set to IDCODE mode, IDCODE is connected
between TDI and TDO. The HD64F2218, HD64F2218U, HD64F2218CU and HD64F2217CU
output fixed codes H'002A200F from the TDO. Serial data cannot be written to IDCODE register
through TDI. Table 13.3 shows the IDCODE register configuration.
Table 13.3 IDCODE Register Configuration
13.3.3
BYPASS is a 1-bit register. If INSTR is specified to BYPASS mode, CLAMP mode, or HIGHZ
mode, BYPASS is connected between TDI and TDO.
13.3.4
BSCAN is a 199-bit shift register assigned on the pins to control input/output pins.
The I/O pins consists of three bits (IN, Control, OUT), input pins 1 bit (IN), and output pins 1 bit
(OUT) of shift registers. The boundary scan test based on the JTAG standard can be performed by
using instructions listed in table 13.2. Table 13.4 shows the correspondence between the LSI pins
and boundary scan registers. (In table 13.4, Control indicates the high active pin. By specifying
Control to high, the pin is driven by OUT. ) Figure 13.2 shows the boundary scan register
configuration example.
Rev.7.00 Dec. 24, 2008 Page 454 of 698
REJ09B0074-0700
Bits
HD64F2218,
HD64F2218U,
HD64F2218CU and
HD64F2217CU codes
Contents
IDCODE Register (IDCODE)
BYPASS Register (BYPASS)
Boundary Scan Register (BSCANR)
31 to 28
0000
Version
(4 bits)
27 to 12
0000 0010 1010 0010
Part No.
(16 bits)
11 to 1
0000 0000 111
Product No.
(11 bits)
Fixed code
0
1
(1 bit)

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