DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 437

IC H8S/2218 MCU FLASH 112-LFBGA

DF2218BR24V

Manufacturer Part Number
DF2218BR24V
Description
IC H8S/2218 MCU FLASH 112-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2218BR24V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
112-LFBGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2218BR24V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit
5
4
Bit Name Initial Value R/W
ORER
ERS
0
0
R/(W)*
R/(W)*
1
1
Overrun Error
Indicates that an overrun error occurred during reception,
causing abnormal termination.
[Setting condition]
[Clearing condition]
Error Signal Status
Indicates that the status of an error, signal 1 returned from
the reception side at reception
[Setting condition]
[Clearing condition]
Description
When the next serial reception is completed while
RDRF = 1
The receive data prior to the overrun error is retained
in RDR, and the data received subsequently is lost.
Also, subsequent serial cannot be continued while the
ORER flag is set to 1. In clocked synchronous mode,
serial transmission cannot be continued, either.
When 0 is written to ORER after reading ORER = 1*
The ORER flag is not affected and retains its previous
state when the RE bit in SCR is cleared to 0.
When the low level of the error signal is sampled
When 0 is written to ERS after reading ERS = 1*
The ERS flag is not affected and retains its previous
state when the RE bit in SCR is cleared to 0.
Rev.7.00 Dec. 24, 2008 Page 381 of 698
REJ09B0074-0700
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