DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 23

IC H8S/2218 MCU FLASH 112-LFBGA

DF2218BR24V

Manufacturer Part Number
DF2218BR24V
Description
IC H8S/2218 MCU FLASH 112-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2218BR24V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
112-LFBGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2218BR24V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 1 Overview
1.1
1.2
1.3
1.4
1.5
Section 2 CPU
2.1
2.2
2.3
2.4
2.5
2.6
2.7
Overview...........................................................................................................................
Internal Block Diagram.....................................................................................................
Pin Arrangements..............................................................................................................
Pin Functions in Each Operating Mode ............................................................................ 15
Pin Functions .................................................................................................................... 21
Features ............................................................................................................................. 31
2.1.1
2.1.2
2.1.3
CPU Operating Modes ...................................................................................................... 34
2.2.1
2.2.2
Address Space ................................................................................................................... 38
Register Configuration ...................................................................................................... 39
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
Data Formats ..................................................................................................................... 43
2.5.1
2.5.2
Instruction Set ................................................................................................................... 45
2.6.1
2.6.2
Addressing Modes and Effective Address Calculation ..................................................... 58
2.7.1
2.7.2
2.7.3
2.7.4
2.7.5
2.7.6
2.7.7
2.7.8
2.7.9
Differences between H8S/2600 CPU and H8S/2000 CPU .................................. 32
Differences from H8/300 CPU............................................................................. 33
Differences from H8/300H CPU.......................................................................... 33
Normal Mode ....................................................................................................... 34
Advanced Mode ................................................................................................... 36
General Registers ................................................................................................. 40
Program Counter (PC) ......................................................................................... 41
Extended Control Register (EXR) ....................................................................... 41
Condition-Code Register (CCR) .......................................................................... 42
Initial Register Values.......................................................................................... 43
General Register Data Formats ............................................................................ 43
Memory Data Formats ......................................................................................... 45
Table of Instructions Classified by Function ....................................................... 47
Basic Instruction Formats .................................................................................... 57
Register Direct—Rn............................................................................................. 58
Register Indirect—@ERn .................................................................................... 58
Register Indirect with Displacement—@(d:16, ERn) or @(d:32, ERn).............. 59
Register Indirect with Post-Increment or Pre-Decrement—@ERn+ or @-ERn .. 59
Absolute Address—@aa:8, @aa:16, @aa:24, or @aa:32.................................... 59
Immediate—#xx:8, #xx:16, or #xx:32 ................................................................. 60
Program-Counter Relative—@(d:8, PC) or @(d:16, PC).................................... 60
Memory Indirect—@@aa:8 ................................................................................ 61
Effective Address Calculation ............................................................................. 62
...................................................................................................................... 31
.............................................................................................................
Contents
Rev.7.00 Dec. 24, 2008 Page xxi of liv
REJ09B0074-0700
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