DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 521

IC H8S/2218 MCU FLASH 112-LFBGA

DF2218BR24V

Manufacturer Part Number
DF2218BR24V
Description
IC H8S/2218 MCU FLASH 112-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2218BR24V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
112-LFBGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2218BR24V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
This LSI incorporates a USB function module complying with USB standard version 1.1. Figure
14.1 shows the block diagram of the USB.
14.1
• USB standard version 2.0 full speed mode (12 Mbps) support
• Bus-powered mode or self-powered mode is selectable via the USB specific pin (UBPM)
• On-chip PLL circuit to generate the USB operation clock (24 MHz × 2 = 48 MHz, 16 MHz × 3
• On-chip bus transceiver
• Standard commands are processed automatically by hardware
• Current Configuration value can be checked by Set_Configuration interrupt
• Three transfer modes supported (Control, Bulk, Interrupt)
• Configuration of four endpoints; EP0, EP1, EP2, and EP3
• 16 kinds of interrupts
• DMA transfer interface
• 8-bit bus (3 cycle access timing) connected to the external bus interface
Configuration 1
= 48 MHz)
⎯ Only Set_Descriptor, Get_Descriptor, Class/VendorCommand, and SynchFrame
⎯ Suspend/resume interrupt source can be assigned for IRQ6
⎯ Each interrupt source except the suspend/resume interrupt source can be assigned for
⎯ DMA transfer is enabled for the Bulk transfer data of EP1 and EP2
⎯ Internal registers are addressed to a part of area 6 of external address (H'C00000 to
⎯ Address H'C00100 to H'DFFFFF is for USB reserved area and thus access prohibited.
commands should be processed by software
EXIRQ0 or EXIRQ1 via registers
H'DFFFFF)
Features
Section 14 Universal Serial Bus (USB)
Interface0
Alternate 0
Total 456-byte FIFO incorporated
EP0s (Control_setup transfer, FIFO 8 bytes)
EP0i (Control_in transfer, FIFO 64 bytes)
EP0o (Control_out tranfer, FIFO 64 bytes)
EP1 (Bulk_in transfer, FIFO 64 bytes × 2 [dual-buffer confifugraion])
EP2 (Bulk_out transfer, FIFO 64 bytes × 2 [dual-buffer confifugraion])
EP3 (Interrup_in transfer, FIFO 64 bytes)
Rev.7.00 Dec. 24, 2008 Page 465 of 698
REJ09B0074-0700

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