DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 358

IC H8S/2218 MCU FLASH 112-LFBGA

DF2218BR24V

Manufacturer Part Number
DF2218BR24V
Description
IC H8S/2218 MCU FLASH 112-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2218BR24V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
112-LFBGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2218BR24V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
2. Free-running count operation and periodic count operation
Rev.7.00 Dec. 24, 2008 Page 302 of 698
REJ09B0074-0700
Immediately after a reset, the TPU's TCNT counters are all designated as free-running
counters. When the relevant bit in TSTR is set to 1 the corresponding TCNT counter starts up-
count operation as a free-running counter. When TCNT overflows (from H'FFFF to H'0000),
the TCFV bit in TSR is set to 1. If the value of the corresponding TCIEV bit in TIER is 1 at
this point, the TPU requests an interrupt. After overflow, TCNT starts counting up again from
H'0000. Figure 9.7 illustrates free-running counter operation.
When compare match is selected as the TCNT clearing source, the TCNT counter for the
relevant channel performs periodic count operation. The TGR register for setting the period is
designated as an output compare register, and counter clearing by compare match is selected by
means of bits CCLR2 to CCLR0 in TCR. After the settings have been made, TCNT starts up-
count operation as periodic counter when the corresponding bit in TSTR is set to 1. When the
count value matches the value in TGR, the TGF bit in TSR is set to 1 and TCNT is cleared to
H'0000. If the value of the corresponding TGIE bit in TIER is 1 at this point, the TPU requests
an interrupt. After a compare match, TCNT starts counting up again from H'0000. Figure 9.8
illustrates periodic counter operation.
H'FFFF
H'0000
CST bit
TCFV
TCNT value
Figure 9.7 Free-Running Counter Operation
Time

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