MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 100

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MC68HC711P2CFN4

Manufacturer Part Number
MC68HC711P2CFN4
Description
IC MCU 32K OTP 4MHZ 84-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711P2CFN4

Core Processor
HC11
Core Size
8-Bit
Speed
4MHz
Connectivity
MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Eeprom Size
640 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Serial Communications Interface (SCI)
5.8.5 SCSR2 — SCI status register 2
5.8.6 SCDRH, SCDRL — SCI data high/low registers
Technical Data
SCI 1 data high (SCDRH)
SCI 1 data low (SCDRL)
SCI 1 status 2 (SCSR2)
In the SCSR2 only bit 0 is used, to indicate receiver active. The other
seven bits always read zero.
Bits [7:1] — Not implemented; always read zero
RAF — Receiver active flag (read only)
SCDRH/SCDRL is a parallel register that performs two functions. It is the
receive data register when it is read, and the transmit data register when
it is written. Reads access the receive data buffer and writes access the
transmit data buffer. Data received or transmitted is double buffered.
R8 — Receiver bit 8
T8 — Transmitter bit 8
Bits [5:0] — Not implemented; always read zero
R/T[7:0] — Receiver/transmitter data bits [7:0]
Freescale Semiconductor, Inc.
Ninth serial data bit received when SCI is configured for a nine data
bit operation
Ninth serial data bit transmitted when SCI is configured for a nine data
bit operation
SCI data is double buffered in both directions.
Address bit 7
Address bit 7
For More Information On This Product,
$0075
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$0077 R7T7 R6T6 R5T5 R4T4 R3T3 R2T2 R1T1 R0T0 undefined
1 = A character is being received.
0 = A character is not being received.
Serial Communications Interface (SCI)
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R8
0
bit 6
bit 6
T8
0
bit 5
bit 5
0
0
bit 4
bit 4
0
0
bit 3
bit 3
0
0
bit 2
bit 2
0
0
MC68HC11P2 — Rev 1.0
bit 1
bit 1
0
0
RAF 0000 0000
bit 0
bit 0
0
undefined
on reset
on reset
State
State

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