MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 222
MC68HC711P2CFN4
Manufacturer Part Number
MC68HC711P2CFN4
Description
IC MCU 32K OTP 4MHZ 84-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet
1.MC711P2CFNE4.pdf
(268 pages)
Specifications of MC68HC711P2CFN4
Core Processor
HC11
Core Size
8-Bit
Speed
4MHz
Connectivity
MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Eeprom Size
640 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC711P2CFN4
Manufacturer:
MOT
Quantity:
5 510
Company:
Part Number:
MC68HC711P2CFN4
Manufacturer:
HITACHI
Quantity:
5 510
Company:
Part Number:
MC68HC711P2CFN4
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68HC711P2CFN4
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
- Current page: 222 of 268
- Download datasheet (3Mb)
CPU Core and Instruction Set
11.6.3 Extended (EXT)
11.6.4 Indexed (IND, X; IND, Y)
11.6.5 Inherent (INH)
11.6.6 Relative (REL)
Technical Data
In the extended addressing mode, the effective address of the argument
is contained in two bytes following the opcode byte. These are three-
byte instructions (or four-byte instructions if a prebyte is required). One
or two bytes are needed for the opcode and two for the effective address.
In the indexed addressing mode, an 8-bit unsigned offset contained in
the instruction is added to the value contained in an index register (IX or
IY) — the sum is the effective address. This addressing mode allows
referencing of any memory location in the 64kbyte address space.
These are two- to five-byte instructions, depending on whether or not a
prebyte is required.
In the inherent addressing mode, all the information necessary to
execute the instruction is contained in the opcode. Operations that use
only the index registers or accumulators, as well as control instructions
with no arguments, are included in this addressing mode. These are one
or two-byte instructions.
The relative addressing mode is used only for branch instructions. If the
branch condition is true, an 8-bit signed offset included in the instruction
is added to the contents of the program counter to form the effective
branch address. Otherwise, control proceeds to the next instruction.
These are usually two-byte instructions.
Freescale Semiconductor, Inc.
For More Information On This Product,
CPU Core and Instruction Set
Go to: www.freescale.com
MC68HC11P2 — Rev 1.0
Related parts for MC68HC711P2CFN4
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet: