MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 195

• Manufacturer Part Number: MC68HC711P2CFN4
• Description: IC MCU 32K OTP 4MHZ 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711P2CFN4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

10.4.10 Analog-to-digital converter
10.4.11 System
10.5 Reset and interrupt priority
MC68HC11P2 — Rev 1.0
The A/D converter configuration is indeterminate after reset. The ADPU
bit is cleared by reset, which disables the A/D system. The conversion
complete flag is cleared by reset.
The EEPROM programming controls are disabled, so the memory
system is configured for normal read operation. PSEL[4:0] are initialized
with the binary value %00110, causing the external IRQ pin to have the
highest I-bit interrupt priority. The IRQ pin is configured for level-
sensitive operation (for wired-OR systems). The RBOOT, SMOD, and
MDA bits in the HPRIO register reflect the status of the MODB and
MODA inputs at the rising edge of reset. The DLY control bit is set to
specify that an oscillator start-up delay is imposed upon recovery from
STOP mode. The clock monitor system is disabled because CME and
FCME are cleared.
Resets and interrupts have a hardware priority that determines which
reset or interrupt is serviced first when simultaneous requests occur. Any
maskable interrupt can be given priority over other maskable interrupts.
The first six interrupt sources are not maskable by the I-bit in the CCR.
The priority arrangement for these sources is fixed and is as follows:
1. POR or RESET pin
2. Clock monitor reset
3. COP watchdog reset
4. XIRQ interrupt
Freescale Semiconductor, Inc.
For More Information On This Product,
– Illegal opcode interrupt — see
of handling
Go to: www.freescale.com
Resets and Interrupts
Illegal opcode trap
Reset and interrupt priority
Resets and Interrupts
Technical Data
for details