MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 256

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MC68HC711P2CFN4

Manufacturer Part Number
MC68HC711P2CFN4
Description
IC MCU 32K OTP 4MHZ 84-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711P2CFN4

Core Processor
HC11
Core Size
8-Bit
Speed
4MHz
Connectivity
MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Eeprom Size
640 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Glossary
branch instruction — An instruction that causes the CPU to continue processing at a memory
break module — A module in the M68HC08 Family. The break module allows software to halt
breakpoint — A number written into the break address registers of the break module. When a
break interrupt — A software interrupt caused by the appearance on the internal address bus
bus — A set of wires that transfers logic signals.
bus clock — The bus clock is derived from the CGMOUT output from the CGM. The bus clock
byte — A set of eight bits.
C — The carry/borrow bit in the condition code register. The CPU08 sets the carry/borrow bit
CCR — See “condition code register.”
central processor unit (CPU) — The primary functioning unit of any computer system. The
CGM — See “clock generator module (CGM).”
clear — To change a bit from logic 1 to logic 0; the opposite of set.
clock — A square wave signal used to synchronize events in a computer.
clock generator module (CGM) — A module in the M68HC08 Family. The CGM generates a
comparator — A device that compares the magnitude of two inputs. A digital comparator defines
Technical Data
location other than the next sequential address.
program execution at a programmable point in order to enter a background routine.
number appears on the internal address bus that is the same as the number in the break
address registers, the CPU executes the software interrupt instruction (SWI).
of the same value that is written in the break address registers.
frequency, f
four.
when an addition operation produces a carry out of bit 7 of the accumulator or when a
subtraction operation requires a borrow. Some logical operations and data manipulation
instructions also clear or set the carry/borrow bit (as in bit test and branch instructions and
shifts and rotates).
CPU controls the execution of instructions.
base clock signal from which the system clocks are derived. The CGM may include a
crystal oscillator circuit and or phase-locked loop (PLL) circuit.
the equality or relative differences between two binary numbers.
op
, is equal to the frequency of the oscillator output, CGMXCLK, divided by
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Glossary
MC68HC11P2 — Rev 1.0

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