MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 118

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MC68HC711P2CFN4

Manufacturer Part Number
MC68HC711P2CFN4
Description
IC MCU 32K OTP 4MHZ 84-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711P2CFN4

Core Processor
HC11
Core Size
8-Bit
Speed
4MHz
Connectivity
MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Eeprom Size
640 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Motorola Interconnect Bus (MI BUS)
6.10.1 INIT2 — EEPROM mapping and MI BUS delay register
Technical Data
EEPROM mapping (INIT2)
This register sets the MI BUS delay time. INIT2 may be read at any time
but bits 7–4 may be written only once after reset in normal modes (bits
3–0 may be written at any time).
EE[3:0] — EEPROM map position
M3DL1:M3DL0, M2DL1:M2DL0 — MI BUS delay select
Freescale Semiconductor, Inc.
EEPROM is located at $xD80–$xFFF, where x is the hexadecimal
digit represented by EE[3:0]. Refer to
and MI BUS delay
These bits are used to set up the delay for the start of the NRZ receive
for MI BUS operation as shown (for a 20kHz bit rate) in the following
table. Each MI BUS module is controlled by one pair of bits.
Address bit 7
For More Information On This Product,
$0037
Motorola Interconnect Bus (MI BUS)
Go to: www.freescale.com
EE3
1. 20kHz bit rate requires 25µs (40kHz) time slots.
2. 25µs ÷ 16
MxDL1
0
0
1
1
bit 6
EE2
register.
MxDL0
bit 5
EE1
0
1
0
1
bit 4
EE0 M3DL1 M3DL0 M2DL1 M2DL0 0000 0000
Delay factor
bit 3
1
2
3
4
INIT2 — EEPROM mapping
bit 2
Delay time
1.5625µs
3.1250µs
4.6875µs
6.2500µs
MC68HC11P2 — Rev 1.0
bit 1
(2)
(1)
bit 0
on reset
State

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