MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 59

• Manufacturer Part Number: MC68HC711P2CFN4
• Description: IC MCU 32K OTP 4MHZ 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711P2CFN4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

MC68HC11P2 — Rev 1.0
CSEL — Clock select (refer to
IRQE — Configure IRQ for falling edge sensitive operation
DLY — Enable oscillator start-up delay
CME — Clock monitor enable (refer to
FCME — Force clock monitor enable (refer to
CR[1:0] — COP timer rate select bits (refer to
Freescale Semiconductor, Inc.
After enabling the A/D power, at least 100µs should be allowed for
system stabilization.
Selects alternate clock source for on-chip EEPROM and A/D charge
pumps. The on-chip RC clock should be used when the E clock
frequency falls below 1MHz.
In order to use both STOP and clock monitor, the CME bit should be
set before executing STOP, then set again after recovering from
STOP.
When FCME is set, slow or stopped clocks will cause a clock failure
reset sequence. To utilize STOP mode, FCME should always be
cleared.
For More Information On This Product,
1 = A/D and EEPROM use internal RC clock source (about
0 = A/D and EEPROM use system E clock (must be at least 1MHz).
1 = Falling edge sensitive operation.
0 = Low level sensitive operation.
1 = A delay of approximately 4064 E clock cycles is imposed as the
0 = The oscillator start-up delay coming out of STOP is bypassed
1 = Clock monitor enabled.
0 = Clock monitor disabled.
1 = Clock monitor enabled; cannot be disabled until next reset.
0 = Clock monitor follows the state of the CME bit.
Operating Modes and On-Chip Memory
1.5MHz).
MCU is started up from the STOP mode.
and the MCU resumes processing within about four bus
cycles. A stable external oscillator is required if this option is
selected.
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Analog-to-Digital
Operating Modes and On-Chip Memory
Resets and
Resets and
Resets and
Converter)
Interrupts)
System initialization
Technical Data
Interrupts)
Interrupts)