MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 51

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MC68HC711P2CFN4

Manufacturer Part Number
MC68HC711P2CFN4
Description
IC MCU 32K OTP 4MHZ 84-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711P2CFN4

Core Processor
HC11
Core Size
8-Bit
Speed
4MHz
Connectivity
MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Eeprom Size
640 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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3.5 System initialization
3.5.1 Mode selection
MC68HC11P2 — Rev 1.0
1. Bits 1 and 0 can be written once and only in first 64 cycles; when SMOD = 1, however, these bits can be written at any
2. Bits can be written to zero once and only in first 64 cycles or in special modes. Bits can be set to one at any time.
3. Bit 4 (IRVNE) can be written only once.
4. Bits 5, 4, 2, 1, and 0 can be written once and only in first 64 cycles; when SMOD = 1, however, bits 5, 4, 2, 1, and 0 can
Register
address
$x03D
$x024
$x035
$x037
$x038
$x039
time. All other bits can be written at any time.
be written at any time. All other bits can be written at any time.
System configuration options register (OPTION)
System configuration options register 2 (OPT2)
Timer interrupt mask register 2 (TMSK2)
EEPROM mapping register (INIT2)
Table 3-3. Registers with limited write access
Registers and bits that control initialization and the basic operation of the
MCU are protected against writes except under special circumstances.
The following table lists registers that can be written only once after
reset, or that must be written within the first 64 cycles after reset.
The four mode variations are selected by the logic states of the mode A
(MODA) and mode B (MODB) pins during reset. The MODA and MODB
logic levels determine the logic state of special mode (SMOD) and the
mode A (MDA) control bits in the highest priority I-bit interrupt and
miscellaneous (HPRIO) register.
After reset is released, the mode select pins no longer influence the
MCU operating mode. In single chip operating mode, MODA pin is
connected to a logic zero. In expanded mode, MODA is normally
connected to V
also functions as the load instruction register (LIR) pin when the MCU is
not in reset. The open-drain active low LIR output pin drives low during
the first E cycle of each instruction. The MODB pin also functions as the
RAM and I/O map register (INIT)
Block protect register (BPROT)
Freescale Semiconductor, Inc.
For More Information On This Product,
Operating Modes and On-Chip Memory
Register
name
Go to: www.freescale.com
DD
through a pull-up resistor of 4.7 k¾. The MODA pin
Operating Modes and On-Chip Memory
Must be written in
first 64 cycles
Yes
No
No
(1)
(2)
(4)
System initialization
Technical Data
once only
Write
Yes
(3)

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