MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 149

• Manufacturer Part Number: MC68HC711P2CFN4
• Description: IC MCU 32K OTP 4MHZ 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711P2CFN4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

8.5.4 OC1D — Output compare 1 data register
8.5.5 TCNT — Timer counter register
MC68HC11P2 — Rev 1.0
Output compare 1 data (OC1D) $000D OC1D7OC1D6OC1D5OC1D4OC1D3
Timer count (TCNT) high
Timer count (TCNT) low
Use this register with OC1 to specify the data that is to be written to the
affected pin of port A after a successful OC1 compare. When a
successful OC1 compare occurs, a data bit in OC1D is written to the
corresponding pin of port A for each bit that is set in OC1M.
OC1D[7:3] — Output compare data for OC1
Bits [2:0] — Not implemented; always read zero
The 16-bit read-only TCNT register contains the prescaled value of the
16-bit timer. A full counter read addresses the more significant byte
(MSB) first. A read of this address causes the less significant byte (LSB)
to be latched into a buffer for the next CPU cycle so that a double-byte
read returns the full 16-bit state of the counter at the time of the MSB
read cycle.
TCNT resets to $0000.
Freescale Semiconductor, Inc.
If OC1Mx is set, data in OC1Dx is output to port A pin x on successful
OC1 compares.
Address bit 7
Address bit 7
For More Information On This Product,
$000E (bit 15) (14)
$000F (bit 7)
Go to: www.freescale.com
Timing System
bit 6
bit 6
(6)
bit 5
bit 5
(13)
(5)
bit 4
bit 4
(12)
(4)
bit 3
bit 3
(11)
(3)
bit 2
bit 2
(10)
(2)
0
bit 1
bit 1
(1)
(9)
0
(bit 8) 0000 0000
(bit 0) 0000 0000
bit 0
bit 0
Output compare
0
Technical Data
Timing System
0000 0000
on reset
on reset
State
State