MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 160

• Manufacturer Part Number: MC68HC711P2CFN4
• Description: IC MCU 32K OTP 4MHZ 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711P2CFN4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Timing System
8.8.1 PACTL — Pulse accumulator control register
Technical Data
Pulse accumulator control
(PACTL)
Four of this register’s bits control an 8-bit pulse accumulator system.
Another bit enables either the OC5 function or the IC4 function, while two
other bits select the rate for the real-time interrupt system.
Bits [7, 3] — Not implemented; always read zero
PAEN — Pulse accumulator system enable
PAMOD — Pulse accumulator mode
PEDGE — Pulse accumulator edge control
I4/O5 — Input capture 4/output compare 5
RTR[1:0] — RTI interrupt rate selects (refer to
Freescale Semiconductor, Inc.
This bit has different meanings depending on the state of the PAMOD
bit, as shown:
Address bit 7
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1 = Pulse accumulator enabled.
0 = Pulse accumulator disabled.
1 = Gated time accumulation mode.
0 = Event counter mode.
1 = Input capture 4 function is enabled (no OC5).
0 = Output compare 5 function is enabled (no IC4).
PAMOD PEDGE
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0
0
1
1
0
Timing System
PAEN PAMODPEDGE
bit 6
0
1
0
1
bit 5
PAI falling edge increments the counter.
PAI rising edge increments the counter.
A zero on PAI inhibits counting.
A one on PAI inhibits counting.
bit 4
Action of clock
bit 3
0
I4/O5 RTR1 RTR0 0000 0000
bit 2
Real-time
MC68HC11P2 — Rev 1.0
bit 1
bit 0
interrupt)
on reset
State