n25q256 Numonyx, n25q256 Datasheet - Page 10

• Manufacturer Part Number: n25q256
• Description: 256-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

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Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
MLP8 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
SO16 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
BGA connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Bus master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
SPI Modes Supported. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Upper and Bottom 128 Bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4-Byte Address on One Wire, Extended SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4-Byte Address on Two Wires, Extended SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4-Byte Address on Four Wires, Extended SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4-Byte Address on Two Wires, Dual SPI, Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4-Byte Address on Four Wires, Quad SPI Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4-Byte Address Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Hold condition activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Non Volatile and Volatile configuration Register Scheme . . . . . . . . . . . . . . . . . . . . . . . . . 37
4-Byte Address Mode Default by NVCR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Read identification instruction and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Read Data Bytes instruction and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Read Data Bytes using 4 Byte Address Instruction and Data-Out Sequence . . . . . . . . . . 67
Read Data Bytes at Higher Speed instruction and data-out sequence . . . . . . . . . . . . . . . 68
Read Data Bytes at Higher Speed using 4 Byte Address Instruction . . . . . . . . . . . . . . . . . 69
Read Serial Flash Discovery Instruction and Data-out Sequence . . . . . . . . . . . . . . . . . . . 70
Dual Output Fast Read Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Dual Output Fast Read using 4 Byte Address Instruction and Data-Out Sequence. . . . . . 72
Dual I/O Fast Read Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Dual Input/Output Fast Read using 4 Byte Address Instruction and Data-Out Sequence . 74
Quad Output Fast Read instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Quad Output Fast Read using 4 Byte Address Instruction and Data-Out Sequence . . . . . 77
Quad Input/Output Fast Read instruction sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Quad Input/Output Fast Read using 4 Byte Address Instruction and Data-Out Sequence 79
Read OTP instruction and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Write Enable instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Write Disable instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Page Program Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Dual Input Fast Program instruction sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Dual Input Extended Fast Program instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . 86
Quad Input Fast Program Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Quad Input Extended Fast Program instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . 88
Program OTP instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
How to permanently lock the OTP bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Subsector Erase instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Sector Erase instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Bulk Erase instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Read Status Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Write Status Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Read Lock Register instruction and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Write to Lock Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
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N25Q256 - 3 V