n25q256 Numonyx, n25q256 Datasheet - Page 118

• Manufacturer Part Number: n25q256
• Description: 256-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

Instructions
9.2.7
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Write Disable (WRDI)
The Write Disable (WRDI) instruction resets the Write Enable Latch (WEL) bit.
Apart form the parallelizing of the instruction code on the two pins DQ0 and DQ1, the
instruction functionality is exactly the same as the Write Disable (WRDI) instruction of the
Extended SPI protocol, please refer to
details.
Figure 68. Write Disable instruction sequence DIO-SPI
C
DQ0
DQ1
S
0
Instruction
Section 9.1.17: Write Disable (WRDI)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
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2
Dual_Write_Disable
3
4
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