n25q256 Numonyx, n25q256 Datasheet - Page 92

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n25q256

Manufacturer Part Number
n25q256
Description
256-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet

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Instructions
9.1.25
92/186
Sector Erase (SE)
The Sector Erase (SE) instruction sets to '1' (FFh) all bits inside the chosen sector. Before it
can be accepted, a Write Enable (WREN) instruction must previously have been executed.
After the Write Enable (WREN) instruction has been decoded, the device sets the Write
Enable Latch (WEL).
The Sector Erase (SE) instruction is entered by driving Chip Select (S) Low, followed by the
instruction code, and three address bytes on Serial Data input (DQ0). Any address inside
the sector is a valid address for the Sector Erase (SE) instruction. Chip Select (S) must be
driven Low for the entire duration of the sequence.
Chip Select (S) must be driven High after the eighth bit of the last address byte has been
latched in, otherwise the Sector Erase (SE) instruction is not executed. As soon as Chip
Select (S) is driven High, the self-timed Sector Erase cycle (whose duration is tSE) is
initiated. While the Sector Erase cycle is in progress, the Status Register may be read to
check the value of the Write In Progress (WIP) bit. The Write In Progress (WIP) bit is 1
during the self-timed Sector Erase cycle, and is 0 when it is completed. At some unspecified
time before the cycle is completed, the Write Enable Latch (WEL) bit is reset.
A Sector Erase (SE) instruction applied to a page which is protected by the Block Protect
(BP3, BP2, BP1, BP0 and TB) bits is not executed.
A Sector Erase cycle can be paused by mean of Program/Erase Suspend (PES) instruction
and resumed by mean of Program/Erase Resume (PER) instruction.
If 4-byte address mode is enabled, the device uses a 32-bit address as explained and
shown in
Figure 43. Sector Erase instruction sequence
S
C
DQ0
Section 5.1.2: 4 Byte Address Mode on page 25
0
1
2
Instruction
3
4
5
6
Micron Technology, Inc., reserves the right to change products or specifications without notice.
7
MSB
23 22
8
9
24 Bit Address
2
29 30 31
1
©2010 Micron Technology, Inc. All rights reserved.
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N25Q256 - 3 V

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