n25q256 Numonyx, n25q256 Datasheet - Page 114

• Manufacturer Part Number: n25q256
• Description: 256-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

Instructions
9.2.2
Note:
114/186
DQ0
DQ1
C
S
0
Instruction
1
2
Read Serial Flash Discovery Parameter
The Read Serial Flash Discovery Parameter (RDSFDP) instruction allows to read the Serial
Flash Discovery Parameter area (SFDP) in the DIO-SPI protocol.
The instruction functionality is exactly the same as the Read Serial Flash Discovery
Parameter instruction of the Extended SPI protocol; the only difference is that in the DIO-
SPI protocol instruction code, address and output data are all parallelized on the two pins
DQ0 and DQ1.
The serial flash discovery parameter area is always addressable by means 3 byte
regardless active address mode.
The dummy bits can not be parallelized since these clock cycles are requested to perform
the internal reading operation.
Figure 63. Dual Read Serial Flash Discovery Parameter
3
23 21 19 17
22 20 18 16
4
5
6
7
24-Bit Address
15 13 11 9
14 12 10 8
8
9 10 11
12 13 14 15
7
6
5
4
3
2
1
0
16 17 18 19 20 21 22 23 24 25 26 27 28
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Dummy cycles
7
MSB
6
©2010 Micron Technology, Inc. All rights reserved.
Data Out 1
5
4
3
2
1
0
N25Q256 - 3 V
MSB
6
7
Data Out n
4
5
2
3
0
1