n25q256 Numonyx, n25q256 Datasheet - Page 86

• Manufacturer Part Number: n25q256
• Description: 256-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

Instructions
9.1.20
9.1.21
86/186
DQ0
DQ1
DQ0
DQ1
C
S
C
S
Mode 3
Mode 0
Dual Input Extended Fast Program
The Dual Input Extended Fast Program (DIEFP) instruction is very similar to the Dual Input
Fast Program (DIFP), except that the address bits are shifted in on two pins (pin DQ0 and
pin DQ1) instead of only one.
If 4-byte address mode is enabled, the device uses a 32-bit address as explained and
shown in
Figure 37. Dual Input Extended Fast Program instruction sequence
Quad Input Fast Program
The Quad Input Fast Program (QIFP) instruction is very similar to the Dual Input Fast
Program (DIFP) instruction, except that the data are entered on four pins (pin DQ0, pin
DQ1, pin W/VPP/DQ2 and pin HOLD/ (DQ3) instead of only two. Inputting the data on four
pins instead of two doubles the data transfer bandwidth compared to the Dual Input Fast
Program (DIFP) instruction.
The Quad Input Fast Program (QIFP) instruction is entered by driving Chip Select (S) Low,
followed by the instruction code, three address bytes and at least one data byte on Serial
Data input (DQ0).
If the 8 least significant address bits (A7-A0) are not all zero, all transmitted data that goes
beyond the end of the current page are programmed from the start address of the same
6
7
20
Section 5.1.2: 4 Byte Address Mode on page 25
Data In 1
0
4
5
21
MSB
1
2
3
22 23 24 25 26 27 28 29 30 31 32 33
2
Instruction
0
1
3
6
7
Data In 2
4
4
5
MSB
5
2
3
6
0
1
7
7
6
22 20 18 16
23 21 19 17 15 13 11 9
8
MSB
Data In 3
5
4
9 10 11 12 13 14
3
2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
0
1
24-bit Address
7
6
14 12 10 8
Data In 4
MSB
5
4
3
2
34
1
0
35
15 16 17 18 19
6
7
4
6
7
5
©2010 Micron Technology, Inc. All rights reserved.
Data In 256
2
4
5
3
MSB
0
2
3
1
0
1
N25Q256 - 3 V