n25q256 Numonyx, n25q256 Datasheet - Page 20

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n25q256

Manufacturer Part Number
n25q256
Description
256-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet

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SPI Modes
20/186
(C
master leaves the SPI bus in high impedance.
Example: C
master never leaves the SPI bus in the high impedance state for a time period shorter than
5 µs. The Write Protect (W) and Hold (HOLD) signals should be driven, High or Low as
appropriate.
Figure 6.
p
CPOL
0
1
= parasitic capacitance of the bus line) is shorter than the time during which the bus
CPHA
0
1
p
SPI Modes Supported
DQ0
DQ1
= 50 pF, that is R*C
C
C
MSB
p
= 5 µs <=> the application must ensure that the bus
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2010 Micron Technology, Inc. All rights reserved.
MSB
N25Q256 - 3 V
AI13730

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