n25q256 Numonyx, n25q256 Datasheet - Page 11

• Manufacturer Part Number: n25q256
• Description: 256-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

N25Q256 - 3 V
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Figure 100. Quad Command Fast Read using 4 Byte Address Instruction QSP, 0Ch . . . . . . . . . . . . 140
Read Flag Status Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Clear Flag Status Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Read NV Configuration Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Write NV Configuration Register instruction sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Read Volatile Configuration Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . 103
Write Volatile Configuration Register instruction sequence . . . . . . . . . . . . . . . . . . . . . . . 104
Read Volatile Enhanced Configuration Register instruction sequence. . . . . . . . . . . . . . . 105
Write Volatile Enhanced Configuration Register instruction sequence. . . . . . . . . . . . . . . 106
Read Extended Address Register Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . 107
Write Extended Address Register Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . 107
Enter 4-Byte Address Mode Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Exit 4-Byte Address Mode Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Reset Enable and Reset Memory Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . 109
Multiple I/O Read Identification instruction and data-out sequence DIO-SPI . . . . . . . . . . 113
Dual Read Serial Flash Discovery Parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Dual Command Fast Read instruction and data-out sequence DIO-SPI . . . . . . . . . . . . . 115
Dual Command Fast Read using 4 Byte Address Instruction and Data-Out Sequence . . 116
Read OTP instruction and data-out sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Write Enable instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Write Disable instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Dual Command Page Program instruction sequence DSP, 02h . . . . . . . . . . . . . . . . . . . 119
Dual Command Page Program instruction sequence DSP, A2h . . . . . . . . . . . . . . . . . . . 119
Dual Command Page Program instruction sequence DSP, D2h . . . . . . . . . . . . . . . . . . . 120
Program OTP instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Subsector Erase instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Sector Erase instruction sequence DIO-SPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Bulk Erase instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Program/Erase Suspend instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . 123
Program/Erase Resume instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Read Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Write Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Read Lock Register instruction and data-out sequence DIO-SPI. . . . . . . . . . . . . . . . . . . 125
Write to Lock Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Read Flag Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . 126
Clear Flag Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . 126
Read NV Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . 127
Write NV Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . 127
Read Volatile Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . 128
Write Volatile Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . 128
Read Volatile Enhanced Configuration Register instruction sequence DIO-SPI . . . . . . . 129
Write Volatile Enhanced Configuration Register Instruction Sequence, Dual I/O. . . . . . . 129
Read Extended Address Register Instruction Sequence, Dual I/O . . . . . . . . . . . . . . . . . 130
Write Extended Address Register Instruction Sequence, Dual I/O. . . . . . . . . . . . . . . . . . 130
Enter 4-Byte Address Mode Instruction Sequence, Dual I/O . . . . . . . . . . . . . . . . . . . . . . 131
Exit 4-Byte Address Mode Instruction Sequence, Dual I/O . . . . . . . . . . . . . . . . . . . . . . . 131
Reset Enable and Reset Memory Instruction Sequence, Dual I/O . . . . . . . . . . . . . . . . . . 132
Multiple I/O Read Identification instruction and data-out sequence QIO-SPI . . . . . . . . . . 136
Quad Read Serial Flash Discovery Parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Quad Command Fast Read instruction and data-out sequence QSP, 0Bh . . . . . . . . . . . 138
Quad Command Fast Read instruction and data-out sequence QSP, 6Bh . . . . . . . . . . . 138
Quad Command Fast Read instruction and data-out sequence QSP, EBh . . . . . . . . . . . 139
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