n25q256 Numonyx, n25q256 Datasheet - Page 63

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n25q256

Manufacturer Part Number
n25q256
Description
256-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet

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N25Q256 - 3 V
Table 16.
1. Accordingly to address mode (default is 3).
2. The Number of dummy clock cycles is configurable by user.
EN4BYTEADDR
EX4BYTEADDR
WREAR
RDEAR
RSTEN
RST
POTP
SSE
SE
BE
PER
PES
RDSR
WRSR
RDLR
WRLR
RFSR
CLFSR
RDNVCR
WRNVCR
RDVCR
WRVCR
RDVECR
WRVECR
Instruction
Instruction set: extended SPI protocol (page 2 of 2)
SubSector Erase
Sector Erase
Bulk Erase
Program/Erase Resume
Program/Erase Suspend
Read Status Register
Write Status Register
Read Flag Status Register 0111 0000
Reset Memory
Program OTP (Program of
OTP area)
Read Lock Register
Write to Lock Register
Clear Flag Status Register 0101 0000
Read NV Configuration
Register
Write NV Configuration
Register
Read Volatile
Configuration Register
Configuration Register
Read Volatile Enhanced
Configuration Register
Write Volatile Enhanced
Configuration Register
Enter 4-byte address
mode
Exit 4-byte address mode
Write Extended Address
Register
Read Extended Address
Register
Reset Enable
Write Volatile
Description
0100 0010
0010 0000
1101 1000
1100 0111
0111 1010
0111 0101
0000 0101
0000 0001
1110 1000
1110 0101
1011 0101
1011 0001
1000 0101
1000 0001
0110 010
0110 0001
1011 0111
1110 1001
1100 0101
1100 1000
0110 0110
1001 1001
Instruction
Code (BIN)
One-byte
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Code (HEX)
42h
20h
D8h
C7h
7Ah
75h
05h
01h
E8h
E5h
70h
50h
B5h
B1h
85h
81h
65h
61h
B7h
E9h
C5h
C8h
66h
99h
Instruction
One-byte
3/4
3/4
3/4
0
0
0
0
0
3/4
3/4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Address
bytes
©2010 Micron Technology, Inc. All rights reserved.
(1)
(1)
(1)
(1)
(1)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Dummy
clock
cycle
Instructions
2
2
1
1
0
0
0
0
0
0
1 to 65
0
0
0
0
0
1 to
1
1 to
1
1 to
0
1 to
1 to
bytes
Data
63/186

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