n25q256 Numonyx, n25q256 Datasheet - Page 71

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n25q256

Manufacturer Part Number
n25q256
Description
256-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet

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N25Q256 - 3 V
9.1.7
DQ0
DQ0
DQ1
DQ1
Dual Output Fast Read (DOFR)
The Dual Output Fast Read (DOFR) instruction is very similar to the Read Data Bytes at
Higher Speed (FAST_READ) instruction, except that the data are shifted out on two pins
(pin DQ0 and pin DQ1) instead of only one. Outputting the data on two pins instead of one
doubles the data transfer bandwidth compared to the Read Data Bytes at Higher Speed
(FAST_READ) instruction.
The device is first selected by driving Chip Select (S) Low. The instruction code for the Dual
Output Fast Read instruction is followed by a 3-byte address (A23-A0) and a dummy byte,
each bit being latched-in during the rising edge of Serial Clock (C). Then the memory
contents, at that address, are shifted out on DQ0 and DQ1 at a maximum frequency Fc,
during the falling edge of Serial Clock (C).
The first byte addressed can be at any location. The address is automatically incremented
to the next higher address after each byte of data is shifted out on DQ0 and DQ1. The whole
memory can, therefore, be read with a single Dual Output Fast Read (DOFR) instruction.
When the highest address is reached, the address counter rolls over to 00000000h, so that
the read sequence can be continued indefinitely.
If 4-byte address mode is enabled, the device uses a 32-bit address as explained and
shown in
Figure 24. Dual Output Fast Read Instruction Sequence
C
S
C
S
Mode 3
Mode 2
32 33 34
Section 5.1.2: 4 Byte Address Mode on page 25
Dummy cycles
0
35
1
36 37 38 39 40 41 42 43 44 45 46
2
Instruction
High Impedance
3
4
MSB
5
6
7
DATA OUT 1
6
4
5
7
2
3
23 22 21
8
0
1
MSB
9 10
Micron Technology, Inc., reserves the right to change products or specifications without notice.
6
7
DATA OUT 2
24-bit Address
4
5
2
3
3
28 29 30 31
0
1
47
2
MSB
6
7
DATA OUT 3
1
4
5
0
2
3
0
1
MSB
©2010 Micron Technology, Inc. All rights reserved.
6
7
DATA OUT n
4
5
2
3
0
1
MSB
Instructions
71/186

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