n25q256 Numonyx, n25q256 Datasheet - Page 82

• Manufacturer Part Number: n25q256
• Description: 256-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

Instructions
9.1.17
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Write Disable (WRDI)
The Write Disable (WRDI) instruction (Figure 9) resets the Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High. The Write Enable Latch (WEL) bit is
reset under the following conditions:
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Figure 34. Write Disable instruction sequence
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DQ0
DQ1
Power-up
Write Disable (WRDI) instruction completion
Write Status Register (WRSR) instruction completion
Write lo Lock Register (WRLR) instruction completion
Write Non Volatile Configuration Register (WRNVCR) instruction completion
Write Volatile Configuration Register (WRVCR) instruction completion
Write Volatile Enhanced Configuration Register (WRVECR) instruction completion
Page Program (PP) instruction completion
Dual Input Fast Program (DIFP) instruction completion
Dual Input Extended Fast Program (DIEFP) instruction completion
Quad Input Fast Program (QIFP) instruction completion
Quad Input Extended Fast Program (QIEFP) instruction completion
Program OTP (POTP) instruction completion
Subsector Erase (SSE) instruction completion
Sector Erase (SE) instruction completion
Bulk Erase (BE) instruction completion
Write Extended Address Register (WREAR) instruction completion
Enter 4-Byte Address Mode (EN4BYTEADDR) instruction completion
Exit 4-Byte Address Mode (EX4BYTEADDR) instruction completion
High Impedance
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Instruction
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AI13732
N25Q256 - 3 V