n25q256 Numonyx, n25q256 Datasheet - Page 159

• Manufacturer Part Number: n25q256
• Description: 256-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

N25Q256 - 3 V
9.3.27
9.3.28
Read Extended Address Register, Quad I/O
The Read Extended Address Register instruction allows the volatile configuration register to
be read.
Figure 127. Read Extended Address Register Instruction Sequence, Quad I/O
Write Extended Address Register, Quad I/O
The Write Extended Address Register, dual I/O instruction allows new values to be written to
the extended address register. Before this instruction can be accepted, a Write Enable
instruction must have been executed previously.
This instruction functions exactly as the Write Extended Address Register instruction of the
Extended SPI protocol, except that for this instruction the instruction code and input data are
on four pins, DQ0, DQ1, DQ2 and DQ3.
Figure 128. Write Extended Address Register Instruction Sequence, Quad I/O
DQ0
DQ2
DQ1
DQ3
S#
C
Instruction
0
DQ0
DQ3
DQ1
DQ2
S#
C
1
5
4
6
7
2
Instruction
0
1
2
3
3
0
5
4
6
7
4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1
1
5
0
2
3
4
5
2
6
7
3
0
1
2
3
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Instructions
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