n25q256 Numonyx, n25q256 Datasheet - Page 28

• Manufacturer Part Number: n25q256
• Description: 256-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

Operating features
5.1.3
5.2
5.2.1
Note:
5.2.2
5.2.3
5.2.4
28/186
Instructions Not Affected by Addressing Mode
Also available are a set of dedicated array reading instructions that always require 4 byte
address regardless active addressing mode. See
protocol.
Extended SPI Protocol Operating features
Read Operations
To read the memory content in Extended SPI protocol different instructions are available:
READ, Fast Read, Dual Output Fast Read, Dual Input Output Fast Read, Quad Output Fast
Read and Quad Input Output Fast read, allowing the application to choose an instruction to
send addresses and receive data by one, two or four data lines.
In the Extended SPI protocol the instruction code is always sent on one data line (DQ0): to
use two or four data lines the user must use either the DIO-SPI or the QIO-SPI protocol
respectively.
For fast read instructions the number of dummy clock cycles is configurable by using VCR
bits [7:4] or NVCR bits [15:12].
After a successful reading instruction a reduced tSHSL equal to 20 ns is allowed to further
improve random access time (in all the other cases tSHSL should be at least 50 ns). See
Table 34.: AC
Page programming
To program one data byte, two instructions are required: write enable (WREN), which is one
byte, and a page program (PP) sequence, which consists of four bytes plus data. This is
followed by the internal program cycle (of duration t
To spread this overhead, the page program (PP) instruction allows up to 256 bytes to be
programmed at a time (changing bits from ‘1’ to ‘0’), provided that they lie in consecutive
addresses on the same page of memory.
For optimized timings, it is recommended to use the page program (PP) instruction to
program all consecutive targeted bytes in a single sequence versus using several page
program (PP) sequences with each containing only a few bytes (see
programming
Dual Input Fast Program
The dual input fast program (DIFP) instruction makes it possible to program up to 256 bytes
using two input pins at the same time (by changing bits from ‘1’ to ‘0’).
For optimized timings, it is recommended to use the DIFP instruction to program all
consecutive targeted bytes in a single sequence rather using several DIFP sequences each
containing only a few bytes (see
Dual Input Extended Fast Program
The Dual Input Extended Fast Program (DIEFP) instruction is an enhanced version of the
Dual Input Fast Program instruction, allowing to transmit address across two data lines.
and
Characteristics.
Table 34: AC
Characteristics).
Section 9.1.19: Dual Input Fast Program
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Table 16.: Instruction set: extended SPI
PP
).
©2010 Micron Technology, Inc. All rights reserved.
Section 5.3.3: Page
(DIFP)).
N25Q256 - 3 V