n25q256 Numonyx, n25q256 Datasheet - Page 126

• Manufacturer Part Number: n25q256
• Description: 256-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

Instructions
9.2.19
9.2.20
126/186
Read Flag Status Register
The Read Flag Status Register (RFSR) instruction allows the Flag Status Register to be
read.
Apart form the parallelizing of the instruction code and the output data on the two pins DQ0
and DQ1, the instruction functionality is exactly the same as the Read Flag Status Register
(RFSR) instruction of the Extended SPI protocol, please refer to
Status Register
Figure 82. Read Flag Status Register instruction sequence DIO-SPI
Clear Flag Status Register
The Clear Flag Status Register (CLFSR) instruction reset the error Flag Status Register bits
(Erase Error bit, Program Error bit, VPP Error bit, Protection Error bit). It is not necessary to
set the WEL bit before the Clear Flag Status Register instruction is executed. The WEL bit
will be unchanged after this command is executed.
Figure 83. Clear Flag Status Register instruction sequence DIO-SPI
DQ0
DQ1
C
S
for further details.
DQ0
DQ1
C
S
0
Instruction
1
2
0
3
Instruction
7
1
6
Micron Technology, Inc., reserves the right to change products or specifications without notice.
4
Flag Status Register Out
5
2
4
5
Byte
3
2
3
6
1
0
7
7
6
8
5
4
9 10 11
Byte
3
2
1
0
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Section 9.1.33: Read Flag
N25Q256 - 3 V