n25q256 Numonyx, n25q256 Datasheet - Page 102

• Manufacturer Part Number: n25q256
• Description: 256-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

Instructions
9.1.35
9.1.36
102/186
S
C
DQ1
DQ0
Read NV Configuration Register
The Read Non Volatile Configuration Register (RDNVCR) instruction allows the Non Volatile
Configuration Register to be read.
Figure 51. Read NV Configuration Register instruction sequence
Write NV Configuration Register
The Write Non Volatile Configuration register (WRNVCR) instruction allows new values to
be written to the Non Volatile Configuration register. Before it can be accepted, a write
enable (WREN) instruction must previously have been executed. After the write enable
(WREN) instruction has been decoded and executed, the device sets the write enable latch
(WEL).
The Write Non Volatile Configuration register (WRNVCR) instruction is entered by driving
Chip Select (S) Low, followed by the instruction code and the data bytes on serial data input
(DQ0).
Chip Select (S) must be driven High after the 16th bit of the data bytes has been latched in.
If not, the Write Non Volatile Configuration register (WRNVCR) instruction is not executed.
As soon as Chip Select (S) is driven High, the self-timed write NV configuration register
cycle (whose duration is tnvcr) is initiated.
While the Write Non Volatile Configuration register cycle is in progress, it is possible to
monitor the end of the process by polling status Register write in progress (WIP) bit or the
Flag Status Register Program/Erase Controller bit. The write in progress (WIP) bit is 1
during the self-timed Write Non Volatile Configuration register cycle, and is 0 when it is
completed. When the cycle is completed, the write enable latch (WEL) is reset.
The Write Non Volatile Configuration register (WRNVCR) instruction allows the user to
change the values of all the Non Volatile Configuration Register bits, described in
Non-Volatile Configuration
The Write Non Volatile Configuration Register impacts the memory behavior only after the
next power on sequence.
0
High Impedance
1
2
Instruction
3
4
5
6
7
7
8
Register.
6
9 10 11 12 13 14 15
5
NVCR Out
LS Byte
4
3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2
1
0
15 14 13 12 11 10 9
16 17 18 19 20 21 22 23
NVCR Out
MS Byte
©2010 Micron Technology, Inc. All rights reserved.
8
N25Q256 - 3 V
Table 4.: