n25q256 Numonyx, n25q256 Datasheet - Page 107

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n25q256

Manufacturer Part Number
n25q256
Description
256-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet

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N25Q256 - 3 V
9.1.41
9.1.42
Read Extended Address Register
The Read Extended Address Register (RDEAR) instruction allows the Extended Address
Register to be read.
Figure 57. Read Extended Address Register Instruction Sequence
Write Extended Address Register
The Write Extended Address register (WREAR) instruction allows new values to be written
to the Extended Address register. Before it can be accepted, a write enable (WREN)
instruction must previously have been executed. After the write enable (WREN) instruction
has been decoded and executed, the device sets the write enable latch (WEL).
The Write Extended Address register (WREAR) instruction is entered by driving Chip Select
(S) Low, followed by the instruction code and the data byte on serial data input (DQ0).
Chip Select (S) must be driven High after the eighth bit of the data byte has been latched in.
If not, the The Write Extended Address register (WREAR) instruction is not executed. When
the new data are latched, the write enable latch (WEL) is reset.
The Write Extended Address register (WREAR) instruction allows the user to change the
values of all the Extended Address register bits, described in Table to be defined
The Write Extended Address register impacts the memory behavior right after the instruction
is received by the device.
Figure 58. Write Extended Address Register Instruction Sequence
7 6 5 4 3 2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
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©2010 Micron Technology, Inc. All rights reserved.
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Instructions
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