upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 118

• Manufacturer Part Number: upd78f9211grt2-jjg-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: ETC-unknow

118
(15) Capture operation
(16) Compare operation
<1> If the valid edge of the TI000 pin is to be set as the count clock, do not set the clear/start mode and the
<2> When the CRC001 bit value is 1, capture is not performed in the CR000 register if both the rising and
<3> When the CRC001 bit value is 1, the TM00 count value is not captured in the CR000 register when a
<4> To ensure the reliability of the capture operation, the capture trigger requires a pulse longer than two
<5> The capture operation is performed at the fall of the count clock. A interrupt request input (INTTM0n0),
<6> To use two capture registers, set the TI000 and TI010 pins.
Remark n = 0, 1
The capture operation may not be performed for CR0n0 set in compare mode even if a capture trigger is input.
Remark n = 0, 1
capture trigger at the valid edge of the TI000 pin.
falling edges have been selected as the valid edges of the TI000 pin.
valid edge of the TI010 pin is detected, but the input from the TI010 pin can be used as an external
interrupt source because INTTM000 is generated at that timing.
cycles of the count clock selected by prescaler mode register 00 (PRM00).
however, occurs at the rise of the next count clock.
CR010 capture value
Capture read signal
TM00 count value
Count clock
Edge input
INTTM010
Figure 6-39. Capture Register Data Retention Timing
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
N
User’s Manual U16994EJ3V0UD
X
N + 1
Capture
N + 2
N + 2
M
Capture, but
read value is
not guaranteed
M + 1
M + 1
M + 2