upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 247

• Manufacturer Part Number: upd78f9211grt2-jjg-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: ETC-unknow

CHAPTER 16 FLASH MEMORY
Figure 16-25. Example of Internal Verify Operation in Self Programming Mode
Internal verify
<1> Set internal verify
command (FLCMD = 01H)
<2> Set no. of block for
internal verify, to FLAPH
<3> Set start address to FLAPL
<4> Set the same value as
that of FLAPH to FLAPHC
<5>
Set end address to
FLAPLC
<6> Clear PFS
<7> Clear & restart WDT counter
Note
(WDTE = ACH)
<8> Execute HALT instruction
<9> Check execution result
Abnormal
(VCERR and WEPRERR flags)
Normal
<11> Normal termination
<10> Abnormal termination
Note This setting is not required when the watchdog timer is not used.
Remark
<1> to <11> in Figure 16-25 correspond to <1> to <11> in 16.8.9 (previous page).
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User’s Manual U16994EJ3V0UD