upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 230

no-image

upd78f9211grt2-jjg-a

Manufacturer Part Number
upd78f9211grt2-jjg-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
ETC-unknow
Datasheet
230
(7) Flash write buffer register (FLW)
(8) Protect byte
is valid only in the self-programming mode. Because self-programming of the protected area is invalid, the data
written to the protected area is guaranteed.
This register is set with an 8-bit memory manipulation instruction.
This register is used to store the data to be written to the flash memory.
Reset signal generation clears these registers to 00H.
This protect byte is used to specify the area that is to be protected from writing or erasing. The specified area
Address: 0081H
µ
µ
PRSELF4
PRSELF4
PD78F9210
PD78F9211
Address: FFA8H
Symbol
7
1
0
0
1
0
0
0
0
1
FLW
PRSELF3
PRSELF3
PRSELF4
FLW7
7
1
1
1
1
1
1
1
1
6
Figure 16-18. Format of Flash Write Buffer Register (FLW)
After reset: 00H
Other than above
Other than above
FLW6
PRSELF2
PRSELF2
PRSELF3
Figure 16-19. Format of Protect Byte (1/2)
6
1
1
1
1
1
1
1
1
5
CHAPTER 16 FLASH MEMORY
FLW5
User’s Manual U16994EJ3V0UD
5
PRSELF1
PRSELF1
PRSELF2
R/W
1
1
1
0
0
1
1
1
4
FLW4
4
PRSELF0
PRSELF0
PRSELF1
0
1
1
0
1
0
1
1
3
FLW3
3
Blocks 3 to 0 are protected.
Blocks 1 and 0 are protected.
Blocks 2 and 3 can be written or erased.
All blocks can be written or erased.
Setting prohibited
Blocks 7 to 0 are protected.
Blocks 5 to 0 are protected.
Blocks 6 and 7 can be written or erased.
Blocks 3 to 0 are protected.
Blocks 4 to 7 can be written or erased.
Blocks 1 and 0 are protected.
Blocks 2 to 7 can be written or erased.
All blocks can be written or erased.
Setting prohibited
PRSELF0
FLW2
2
2
FLW1
1
Status
Status
1
1
FLW0
0
0
1

Related parts for upd78f9211grt2-jjg-a