upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 80
upd78f9211grt2-jjg-a
Manufacturer Part Number
upd78f9211grt2-jjg-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
ETC-unknow
Datasheet
1.UPD78F9211GRT2-JJG-A.pdf
(352 pages)
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Note The clock source of the watchdog timer (WDT) is selected from f
refer to CHAPTER 8 WATCHDOG TIMER.
Clock source of
WDT is selected
by software
LSRSTOP = 1
Figure 5-14. Status Transition of Low-Speed Internal Oscillator
Note
oscillator can be stopped
Can be stopped
Low-speed internal
Low-speed internal
oscillator stops
CHAPTER 5 CLOCK GENERATORS
User’s Manual U16994EJ3V0UD
LSRSTOP = 0
if low-speed internal oscillator
Select by option byte
can be stopped or not
power-on clear
Reset by
application
Power
V
DD
> 2.1 V ±0.1 V
oscillator cannot be stopped
Low-speed internal
X
Cannot be stopped
or f
RL
, or it may be stopped. For details,
Reset signal
Clock source of
WDT is fixed to f
RL
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