upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 231

• Manufacturer Part Number: upd78f9211grt2-jjg-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: ETC-unknow

16.8.4 Example of shifting normal mode to self programming mode
programming.
The operating mode must be shifted from normal mode to self programming mode before performing self
An example of shifting to self programming mode is explained below.
<1> Disable interrupts if the interrupt function is used (by setting the interrupt mask flag registers (MK0) to FFH
<2> Clear the flash status register (PFS).
<3> Set self programming mode using a specific sequence.
<4> Check the execution result of the specific sequence using bit 0 (FPRERR) of PFS.
<5> Mode shift is completed.
Caution Be sure to perform the series of operations described above using the user program at an
•
and executing the DI instruction).
• Write a specific value (A5H) to PFCMD.
• Write 01H to FLPMC (writing in this step is invalid).
• Write 0FEH (inverted value of 01H) to FLPMC (writing in this step is invalid).
• Write 01H to FLPMC (writing in this step is valid).
Abnormal → <2>, normal → <5>
µ
PRSELF4
PD78F9212
0
0
0
0
0
0
0
0
1
address where data is not erased nor written.
PRSELF3
1
1
1
1
1
1
1
1
1
Other than above
PRSELF2
Figure 16-19. Format of Protect Byte (2/2)
0
0
0
0
1
1
1
1
1
CHAPTER 16 FLASH MEMORY
User’s Manual U16994EJ3V0UD
PRSELF1
0
0
1
1
0
0
1
1
1
PRSELF0
0
1
0
1
0
1
0
1
1
All blocks can be written or erased.
Blocks 15 to 0 are protected.
Blocks 13 to 0 are protected.
Blocks 14 and 15 can be written or erased.
Blocks 11 to 0 are protected.
Blocks 12 to 15 can be written or erased.
Blocks 9 to 0 are protected.
Blocks 10 to 15 can be written or erased.
Blocks 7 to 0 are protected.
Blocks 8 to 15 can be written or erased.
Blocks 5 to 0 are protected.
Blocks 6 to 15 can be written or erased.
Blocks 3 to 0 are protected.
Blocks 4 to 15 can be written or erased.
Blocks 1 and 0 are protected.
Blocks 2 to 15 can be written or erased.
Setting prohibited
Status
231