upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 95

• Manufacturer Part Number: upd78f9211grt2-jjg-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: ETC-unknow

timer counter 00 (TM00).
cleared to 0 and the interrupt request signal (INTTM000) is generated.
prescaler mode register 00 (PRM00).
the internal clock (f
The external event counter counts the number of external clock pulses to be input to the TI000 pin with using 16-bit
TM00 is incremented each time the valid edge specified by prescaler mode register 00 (PRM00) is input.
When the TM00 count value matches the 16-bit timer capture/compare register 000 (CR000) value, TM00 is
Input a value other than 0000H to CR000. (A count operation with a pulse cannot be carried out.)
The rising edge, the falling edge, or both edges can be selected using bits 4 and 5 (ES000 and ES010) of
Because an operation is carried out only when the valid edge of the TI000 pin is detected twice after sampling with
Remark 0/1: Setting 0 or 1 allows another function to be used simultaneously with the external event counter.
PRM00
CRC00
TMC00
Figure 6-15. Control Register Settings in External Event Counter Mode (with Rising Edge Specified)
ES110
0/1
7
0
7
0
See the description of the respective control registers for details.
XP
ES100
0/1
), noise with a short pulse width can be removed.
6
0
6
0
ES010
5
0
5
0
0
ES000
(c) 16-bit timer mode control register 00 (TMC00)
(a) Capture/compare control register 00 (CRC00)
4
0
4
0
1
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
(b) Prescaler mode register 00 (PRM00)
TMC003
3
0
3
0
1
CRC002
TMC002
0/1
User’s Manual U16994EJ3V0UD
2
0
1
CRC001
PRM001
TMC001
0/1
0/1
1
CRC000
PRM000
OVF00
0
1
0
CR000 used as compare register
Clears and starts on match between TM00 and CR000.
Selects external clock.
Specifies rising edge for pulse width detection.
Setting invalid (setting “10” is prohibited.)
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