upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 269

• Manufacturer Part Number: upd78f9211grt2-jjg-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: ETC-unknow

17.2 Operation List
Notes 1. Except r = A.
Remark One instruction clock cycle is one CPU clock cycle (f
MOV
XCH
Mnemonic
2. Except r = A, X.
(PCC).
r, #byte
saddr, #byte
sfr, #byte
A, r
r, A
A, saddr
saddr, A
A, sfr
sfr, A
A, !addr16
!addr16, A
PSW, #byte
A, PSW
PSW, A
A, [DE]
[DE], A
A, [HL]
[HL], A
A, [HL + byte]
[HL + byte], A
A, X
A, r
A, saddr
A, sfr
A, [DE]
A, [HL]
A, [HL, byte]
Operand
Note 1
Note 1
Note 2
CHAPTER 17 INSTRUCTION SET OVERVIEW
Bytes
3
3
3
2
2
2
2
2
2
3
3
3
2
2
1
1
1
1
2
2
1
2
2
2
1
1
2
User’s Manual U16994EJ3V0UD
Clocks
6
6
6
4
4
4
4
4
4
8
8
6
4
4
6
6
6
6
6
6
4
6
6
6
8
8
8
r ← byte
(saddr) ← byte
sfr ← byte
A ← r
r ← A
(saddr) ← A
sfr ← A
(addr16) ← A
A ← PSW
PSW ← A
A ← (DE)
(DE) ← A
A ← (HL)
(HL) ← A
(HL + byte) ← A
A ↔ X
A ↔ r
A ↔ (DE)
A ↔ (HL)
A ← (saddr)
A ← sfr
A ← (addr16)
PSW ← byte
A ← (HL + byte)
A ↔ (saddr)
A ↔ sfr
A ↔ (HL + byte)
CPU
) selected by the processor clock control register
Operation
Z
×
×
Flag
AC CY
×
×
269
×
×